FIG. 13 shows a high-frequency circuit of a wireless communications apparatus for wireless LAN (local area network). This high-frequency circuit comprises a high-frequency switch SW for switching the connection of an antenna ANT to a transmitting circuit TX and a receiving circuit RX; a filter FIL2, an amplifier PA, a filter FIL1 and a balun BALI disposed in this order from the antenna ANT in a path for passing transmission signals having a frequency f1; and a filter FIL4, a low-noise amplifier LNA, a filter FIL3 and a balun BAL2 disposed in this order from the antenna ANT in a path for passing receiving signals having a frequency f2.
Wireless communications apparatuses such as mobile phones, etc. have been made smaller remarkably, resulting in rapidly miniaturized high-frequency circuits and electronic devices used therein. As an example of the miniaturization of electronic devices, JP 09-116091 A discloses, as shown in FIG. 14, a hybrid integrated circuit device 1000 comprising a multilayer substrate 1120, and parts such as an amplifier-constituting semiconductor device 1550, etc., which are mounted on the multilayer substrate 1120. The amplifier-constituting semiconductor device 1550 is soldered to a mounting electrode 1050 in a cavity of the multilayer substrate 1120, connected to terminal electrodes 1300 on an upper surface of the multilayer substrate 1120 via bonding wires 1600, and sealed by a resin 1540. Devices 1500, 1510 such as reactance devices, resistors, etc. are mounted on the upper surface of the multilayer substrate 1120, and covered with a metal cap 2000. Conductor lines 1200, etc. are formed on insulator layers in the multilayer substrate 1120, and connected to the mounted devices 1500, 1510 through via-holes 1310 and connecting lines. Pluralities of thermal vias 1010 are disposed in an entire region below the amplifier-constituting semiconductor device 1550. The thermal vias 1010 are connected to the mounting electrode 1050, and a ground electrode 1100 formed on a lower surface of the multilayer substrate 1120.
Because the thermal vias 1010 indispensable for removing heat generated by the amplifier-constituting semiconductor device 1550 occupy most part of a region below the amplifier-constituting semiconductor device 1550 as shown in FIG. 14, other circuits cannot be disposed in this region, hindering the miniaturization of the electronic device.
On the other hand, in a high-frequency module (electronic device) 2000 disclosed in JP 2009-182903 A, as shown in FIG. 15, a power amplifier IC (amplifier-constituting semiconductor device) 2550 is mounted on an upper surface of a multilayer substrate 2120, and a filter 2180 formed on insulator layers in the multilayer substrate 2120 is disposed immediately below the power amplifier IC 2550. Thermal vias 2030 for the power amplifier are constituted by a large number of ground via-holes. Unlike the thermal vias 1010 in JP 09-116091 A, this structure makes the connection of the mounting electrode 1050 on the upper surface to the ground electrode 1100 on the lower surface unnecessary, resulting in a reduced number of via-holes, and thus enabling a high-frequency module to be smaller.
The arrangement of a filter below an amplifier-constituting semiconductor device as in JP 2009-182903 A would make a high-frequency module smaller. However, because a usual filter has an input port and an output port separate from each other, a relatively long wiring pattern is needed to connect the filter to an input port of an amplifier-constituting semiconductor device. A longer wiring pattern provides larger parasitic reactance by itself and by interference with other conductor patterns.
In JP 2009-182903 A, the above wiring pattern is formed on the same layer as that for conductor patterns constituting an interdigital λ/4 resonator in a region below the amplifier-constituting semiconductor device, such that it makes a detour around the conductor pattern. Also, tri-plate striplines constituted by ground patterns for the wiring pattern are connected to a chip capacitor mounted on the multilayer substrate through via-holes. Because ground patterns only for the wiring pattern are formed to make a detour around the conductor pattern, there is no enough area for forming resonator-constituting conductor patterns, despite reduced loss by such structure. In addition, an inevitably long wiring pattern provides large loss.